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WWAM Patents

Table of contents

U.S. Patent # Title and comments
US 02,939,120 Controls for Memory Devices
Describes circuits for accessing variable length character/digit strings from core memory (via "scanning chains"). Certainly part of the WWAM circuits. I wonder if this approach was also used in the SPACE/1401...
Assembled diagrams - fig-2
US 02,947,865 Impulse Distributor
Describes strings of triggers to generate timing pulses for core memory readout chains for character serial computing. I suspect this approach was used in the WWAM..
Assembled diagrams - fig-5
US 02,983,357 Electronic Counter Control for Continuous Forms Feeding
Program control of the printer line skip function (to replace paper tape form control, as in the 1403).
Maurice --> Do you recall if this was this was how the WWAM printer did forms control (line spacing and skipping)?
Assembled diagrams - fig-2
US 02,979,260 Data Transfer System
Optimizations for accesses operands in core memory for multiplication and division in digit serial processors.
Assembled diagrams - fig-1
US 3,024,989 Tabulating and Computing Machine
Features three punched card read stations and anther (full?) set of WWAM schematics.
Assembled diagrams - fig-4
US 3,042,903 Means for Transferring Information Between Plural Memory Devices
The patent has an example of "supplying data to a printing device for a calculator", so I'm not sure it was part of the WWAM.
US 3,069,086 Matrix Switching and Computing Systems
This is an intriguing patent... I had not heard of this idea before:
Assembled diagrams - fig-10
US 3,107,342 Editing Machine
It appears to have (nearly complete?) schematics for the WWAM data paths (including plugboard).
Assembled diagrams - fig-2, fig-4 (2 MBytes, some mismatch at the right of plate 4s)
US 03,132,324 Computer Memory Unit and Addressing Means
This one seems like it could apply to the WWAM:
US 3,138,782 Punched Card to Internal Storage Translator with Parity Check
Assembled diagrams - fig-4, fig-5 (fig-5 seems incomplete)
US 03,209,329 Data Processing Aparatus
Additional optimizations for multiplication and division in core memory in digit serial processors, including the accumulator in core (with resversable digit scanning chains or "rings".)
Assembled diagrams - fig-1, fig-3
US 03,219,981 Programming Device for Data Processing Machines.
This patent seems to embody the WWAM control philosophy: plugboard control, but with fairly rigid data paths and repetitive sequence of control steps (scanning chains through memory locations). It's an extension of 2,947,865 (could be placed together). The intro section actually suggests its advantages over stored program computing(!):

page started April 2015

U.S. Patent #	Title and comments
US 02,939,120	Controls for Memory Devices Describes circuits for accessing variable length character/digit strings from core memory (via "scanning chains"). Certainly part of the WWAM circuits. I wonder if this approach was also used in the SPACE/1401... Assembled diagrams - fig-2
US 02,947,865	Impulse Distributor Describes strings of triggers to generate timing pulses for core memory readout chains for character serial computing. I suspect this approach was used in the WWAM.. Assembled diagrams - fig-5
US 02,983,357	Electronic Counter Control for Continuous Forms Feeding Program control of the printer line skip function (to replace paper tape form control, as in the 1403). Maurice --> Do you recall if this was this was how the WWAM printer did forms control (line spacing and skipping)? Assembled diagrams - fig-2
US 02,979,260	Data Transfer System Optimizations for accesses operands in core memory for multiplication and division in digit serial processors. Assembled diagrams - fig-1
US 3,024,989	Tabulating and Computing Machine Features three punched card read stations and anther (full?) set of WWAM schematics. Assembled diagrams - fig-4
US 3,042,903	Means for Transferring Information Between Plural Memory Devices The patent has an example of "supplying data to a printing device for a calculator", so I'm not sure it was part of the WWAM.
US 3,069,086	Matrix Switching and Computing Systems This is an intriguing patent... I had not heard of this idea before: Assembled diagrams - fig-10
US 3,107,342	Editing Machine It appears to have (nearly complete?) schematics for the WWAM data paths (including plugboard). Assembled diagrams - fig-2, fig-4 (2 MBytes, some mismatch at the right of plate 4s)
US 03,132,324	Computer Memory Unit and Addressing Means This one seems like it could apply to the WWAM:
US 3,138,782	Punched Card to Internal Storage Translator with Parity Check Assembled diagrams - fig-4, fig-5 (fig-5 seems incomplete)
US 03,209,329	Data Processing Aparatus Additional optimizations for multiplication and division in core memory in digit serial processors, including the accumulator in core (with resversable digit scanning chains or "rings".) Assembled diagrams - fig-1, fig-3
US 03,219,981	Programming Device for Data Processing Machines. This patent seems to embody the WWAM control philosophy: plugboard control, but with fairly rigid data paths and repetitive sequence of control steps (scanning chains through memory locations). It's an extension of 2,947,865 (could be placed together). The intro section actually suggests its advantages over stored program computing(!):