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Notes on the address modifier

From Ken Shirriff < ken.shirriff@gmail.com >

After my core memory writeup, I decided to take on a smaller component next. Here's a description of the address modifier. While it may seem trivial, there's more to it than you'd expect.

Ken

Address Modifier

The address modifier updates the address stored in the Main STAR register, moving to the next address. It takes a three-character address and modifies it by +1, -1, or +3, in one machine cycle. The +1 step is used to step through instructions. It is also used for reverse scans of a field. The -1 step is used for forward scans of a fields. The +3 step is used for printing; each print subscan looks at every third character.

The operation of the modifier can be understood by looking at the ILD System Data Flow. The contents of the main STAR (Storage-Address Register) are passed to the modifier one digit at a time over the serial lines, from units to hundreds. After being modified, the digit is stored into the appropriate STAR register (I, A, B, A-Aux or B-Aux).

The STAR registers are structured differently from regular storage in order to handle the zone bits and digit bits separately. Each STAR register holds three digits:

The CD and CZ bits provide error detection.

For the hundreds digit, the modifier increments/decrements the hundreds and units zone bits in parallel if there is a carry. Zone bit updates are not supported with +3. (Optional Features p 7) The units zone bits are provided along with the 1406 Storage Unit to support the additional address space and are not shown on the basic ILD.

The address must be modified every cycle, so the speed of the modifier is critical to performance of the 1401. Unlike the arithmetic adder, which adds one digit per cycle, the modifier must update three digits per cycle. The timing of the modifier is as follows:
   
   000-030: units digit modified
   030-060: tens digit modified
   060-090: hundreds digit modified along with units and hundreds zone

Circuitry

The modifier uses the control inputs:
   MOD POS 1: This adds 1
   MOD MINUS 1: This subtracts 1
   MOD PLUS 3: This adds 3
   MOD CONTROL TRANSFER: This transfers the input unchanged.

The modifier control logic selects the appropriate modifier (-1, 0, +1, +3) based on the operation. It uses a trigger to store the carry/borrow from units and tens, and applies a +1/-1 during the tens and hundreds time if necessary. If there is no carry/borrow, MOD CONTROL TRANSFER is used to keep the digit unchanged.

The modifier is not implemented as a standard adder, but each bit is produced by AND-OR logic. The logic is basically brute force of the input and operation combinations that set each output bit. For example, the 4 bit output is generated from ten different combinations. One combination handles increment of 4, 6, or 8: an input with the 4 bit set, the 1 bit clear and a plus 1 operation creates a 4 bit output. (4,6,8 + 1 has 4 bit set)

The units zone bits are computed in parallel with the hundreds digit (bypassing the serialized digit approach used otherwise). Large AND-OR gates check the state of the hundreds bits and the units zone bits to produce the new units zone bits at the same time as the hundreds computation.

Modifier controls are in ALD 32.42 and 32.43 and ILD figure 19. The modifier is in ALD 32.43 and ILD figure 20. The units zone bit circuit isn't in the usual ILD, but is in Australian Logic Diagrams, figures 28 and 31. A few signals in the ILD have confusing names. HA is the serialized value from hundreds A or units A zone bit. HB is similar. UA and UB are the units zone values.

Other uses of modifier

The modifier is also used in a variety of special cases. For example, +3 is used as part of the Modify Address operation (Optional Features p8) to restore the B STAR register to the units position. (Could there be a bug if a Modify Address instruction spans a zone boundary?)

The modifier also allows values to be copied into a STAR register. The SET BUS ENT GATE control line copies the value from the B register. This is used during instruction fetch to load a STAR register. (The ILD System Data Flow diagram shows this separate from the modifier, but it is implemented as part of the modifier.)

The INDEX STAR lines allow the indexing circuitry to supply the address. See Optional Features p17-35 and ALD 41.51.21.2.

The PFR lines allow the Punch-Feed-Read circuitry to supply the hundreds digit of an address. This is used to switch between 0xx and 1xx addresses when copying data from the read buffer to the punch buffer. See Optional Features p 141, ALD 56.12.11.2 and ILD figure 64.

The COL BIN lines modify the hundreds address to 0xx/1xx/4xx/5xx for column binary operations. See Optional Features p131-138, ALD 41.11.31.2 and ILD figure 67.

Updated Sept 6, 2015